Scopus
Conference Paper
1
Oriented IC Design Approach for Small-Volume, Performance-Demanded Edge-AI ASICs
Wang J.S., Chien C.S., Yeh C., Lin T.J., Liu C.T., Wu J.H.
Proceedings of the 2024 10th International Conference on Applied System Innovation, ICASI 2024
2024 , 389-391
Article
2
A 16 nm 140 TOPS/W 5 μj/Inference Keyword Spotting Engine Based on 1D-BCNN
Lin T.J., Ting Y.H., Hsu M.Z., Lin K.H., Huang C.M., Tsai F.C., Sheu S.S., Chang S.C., Yeh C., Wang J.S.
IEEE Transactions on Circuits and Systems II: Express Briefs
2023, 70 (12) , 4564-4568
Conference Paper
3
Force-Sensing Intelligent Vise for Cutting Dynamics Monitoring in Machining
Chen P.H., Lin T.J., Yeh C., Chang P.Z., Li W.C.
Proceedings of IEEE Sensors
2023
Conference Paper
4
A 40nm CMOS SoC for Real-Time Dysarthric Voice Conversion of Stroke Patients
Lin T.J., Liao C.Z., Hu Y.J., Hsu W.C., Wu Z.X., Wang S.Y., Huang C.M., Lai Y.H., Yeh C., Wang J.S.
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2022, 2022-January , 7-8
Conference Paper
5
Life period estimation of stamping process using punch sounds and deep neural network
Chen P.J., Wu T.L., Lin T.J., Lai Y.H., Wu T.L., Yeh C.
Proceedings of the 14th IEEE Conference on Industrial Electronics and Applications, ICIEA 2019
2019 , 625-628
Conference Paper
6
Approximate distributed arithmetic for variable-latency table lookup
Ting Y.H., Lin T.J., Chang C.C., Hu C.C., Yeh C., Wang J.S.
Proceedings - 2017 1st New Generation of CAS, NGCAS 2017
2017 , 137-140
Conference Paper
7
A low complexity edge-preserved image compression algorithm for LCD overdrive
Chang C.Y., Huang C.H., Chen H.F., Yeh C., Chu Y.S., Lin T.J.
2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016
2016
Conference Paper
8
Variable-length VLIW encoding for code size reduction in embedded processors
Shyu T.Y., Su B.Y., Lin T.J., Yeh C., Wang J.S., Chen T.F.
International System on Chip Conference
2016 , 296-299
Conference Paper
9
An area-efficient interpolation method for LCD overdrive technique
Huang C.H., Chang C.Y., Chu Y.S., Yeh C.W.
Proceedings - 2014 International Conference on Information Science, Electronics and Electrical Engineering, ISEEE 2014
2014, 3 , 1718-1721
Conference Paper
10
Accelerometer-based breathing signal acquisition with empirical mode decomposition
Yang B.Y., Chang C.C., Ting Y.H., Liao J.W., Lin H.L., Lin T.J., Yeh C., Wang J.S.
ICISA 2014 - 2014 5th International Conference on Information Science and Applications
2014
學術著作
1
A 230mV-to-500mV 375KHz-to-16MHz 32b RISC Core in 0.18um CMOS
Jinn-Shyan Wang, Jian-Shiun Chen, Yi-Ming Wang and Chingwei Yeh
ISSCC
2007 年
2 月
ISSCC,pp.-
研討會論文
2
Design techniques for single-low-V/sub DD/ CMOS systems
Jinn-Shyan Wang, Hung-Yu Li, Chingwei Yeh and Tien-Fu Chen
J. Solid-State Circuits
2005 年
5 月
J. Solid-State Circuits,Vol.40, No.5,pp.1157-1165
期刊論文
3
Pseudo-footless CMOS Domino Logic Circuits for High-Performance VLSI Design
Jinn-Shyan Wang, Shang-Jyh Shieh, Ching-Wei Yeh and Yuan-Hsun Yeh
IEEE International Symposium on Circuits and Systems
2004 年
6 月
IEEE International Symposium on Circuits and Systems,pp.401-404
研討會論文
4
An Adapted Path Selection Method for Delay Testing of Digital Circuits
W.B. Jone, W.S. Yeh, C. Yeh and S.R. Das
IEEE Trans. on Instrumentation and Measurement
2001 年
10 月
IEEE Trans. on Instrumentation and Measurement,Vol.50, No.5,pp.1109-1118
期刊論文
5
The Design of A Standard Cell Library For Low-Power/Low-Voltage VLSI Applications
J.S. Wang, S.J. Shieh, J.C. Wang, P.H. Yang and C. Yeh
J. Chinese Inst. of Elec. Engr
2001 年
5 月
J. Chinese Inst. of Elec. Engr,Vol.8, No.2,pp.119-132
期刊論文
6
Cell-Based Layout Techniques Supporting Gate-Level Voltage Scaling for Low-Power
C. Yeh and Y. S. Kang
IEEE Trans. on VLSI Systems
2000 年
10 月
IEEE Trans. on VLSI Systems,Vol.8, No.5,pp.629-633
期刊論文
7
A Program Compression Technique Supporting IP-centric SOC Design
C. Yeh and C.S. Wang
Proc. IEEE 13th ASIC/SOC Conference
2000 年
9 月
Proc. IEEE 13th ASIC/SOC Conference,pp.226-230
研討會論文
8
Novel Techniques for Improving Testability Analysis
Y.H. Su, C. H. Cheng, S.C. Chang and C. Yeh
Proc. IEEE the Ninth Asian Test Symposium, ATS
2000 年
月
Proc. IEEE the Ninth Asian Test Symposium, ATS,pp.392-397
研討會論文
9
Power-driven Technology Mapping Using Pattern-oriented Power Modelling
C. Yeh, C. C. Chang and J. S. Wang
IEE Proc.-Comput. Digit. Tech.
1999 年
3 月
IEE Proc.-Comput. Digit. Tech.,Vol.146, No.2,pp.83-89
期刊論文
10
A Simulated Annealing Based Method Supporting Dual Supply Voltages in Standard Cell Placement
C. Yeh and Y. S. Kang
Proc. IEEE Int. Symp. Circuits and Systems
1999 年
5 月
Proc. IEEE Int. Symp. Circuits and Systems,pp.-
研討會論文