Scholar's profile
Wang, Jinnshyan
Professor
Scopus Data (view scopus profile)
Publication Achievements
1997 - 2025
Publication Index
Documents
151
CITATIONS
1719
H-INDEX
21
FWCI
0.49
Co-authors
270
Last Sync Date: 2026-04-03
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ORCID
Scopus
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61Conference Paper
An ultra-low-power fast-lock-in small-jitter all-digital DLL
Digest of Technical Papers IEEE International Solid State Circuits Conference 2005, 48 , 422-60735Citation -
62Conference Paper
An ultra-low-power fast-lock-in small-jitter all-digital DLL
Digest of Technical Papers IEEE International Solid State Circuits Conference 2005, 48 , 346-6742Citation -
63Conference Paper
A low-power high-SFDR CMOS direct digital frequency synthesizer
Proceedings IEEE International Symposium on Circuits and Systems 2005 , 1670-16735Citation -
64Conference Paper
An efficient direct 2-d transform coding ip design for mpeg-4 avc/h.264
Proceedings IEEE International Symposium on Circuits and Systems 2005 , 4517-452013Citation -
65Conference Paper
An all-digital pulsewidth control loop
Proceedings IEEE International Symposium on Circuits and Systems 2005 , 1258-12617Citation -
66Conference Paper
A high-performance low power direct 2-D transform coding IP design for MPEG-4 AVC/H.264 with a switching power suppression technique
2005 IEEE VLSI Tsa International Symposium on VLSI Design Automation and Test VLSI Tsa Dat 2005, 2005 , 291-29412Citation -
67Conference Paper
The split-path AND-type match-line scheme for very high-speed content addressable memories
2005 IEEE Asian Solid State Circuits Conference Asscc 2005 2005 , 525-5285Citation -
68Conference Paper
An efficient Spurious Power Suppression Technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design
Proceedings of the International Symposium on Low Power Electronics and Design 2005 , 155-16011Citation -
69Conference Paper
Design exploration of a Spurious Power Suppression Technique (SPST) and its applications
2005 IEEE Asian Solid State Circuits Conference Asscc 2005 2005 , 341-3444Citation -
70Conference Paper
A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding
2004 IEEE International Conference on Multimedia and Expo Icme 2004, 3 , 1683-16861Citation
Publication
Print-friendly-
111 Reducing power consumption by iterative gate rizing and voltage scalingThe 8th VLSI Design /CAD Symposium 1997 / 8Seminar Paper
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112 Design of a standard cell library for low-voltage/low-power VSLI applicationsThe 8th VLSI Design /CAD Symposium 1997 / 8Seminar Paper
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113 Design and performance analysis of a pulse-triggered TSPC flip-flop for high-speed low-power VLSI design applicationThe 8th VLSI Design/CAD Symposium 1997 / 8Seminar Paper
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114 Low power design of VLSI circuits using gate resizing and supply voltage scaling techniquesIASTED Conference on Modeling, Simulation and Optimization\fR 1997 / 8Seminar Paper
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115 Low-power design of VLSI circuits using gate resizing and supply voltage scaling techniquesThe 8th VLSI Design/CAD Symposium 1997 / 8Seminar Paper
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116 低功率電流模式同步靜態隨機存取記憶體1997 /Monograph
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117 超大型積體電路導論，IEE 4153206, EE/CCU.1996 /Technical Report or Other
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118 A true-single-phase-clocked double-edge-triggered flip-flop for low-power VLSI designsThe 7th VLSI Design/CAD Symposium 1996 / 8Seminar Paper
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119 A CMOS circuit technique with subthreshold-current control for low-voltage low-power VLSI designsThe 7th VLSI/CAD Symposium 1996 / 8Seminar Paper
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120 Low-Voltage low-power CMOS true-single-phase clocking scheme with locally asynchronous logic circuitsIEEE International Symposium on Circuits and Systems 1995 / 5Seminar Paper
Projects
Print-friendly| Teacher's name | Research Units | Year | Project title | Project position | Commissioning unit | Implementation period |
|---|---|---|---|---|---|---|
| Wang, Jinnshyan | Department of Electrical Engineering | 2025 | 利用先進封裝技術整合之大型語言模型計算異質多核RISC-V軟硬體設計(2/2) | PI | 國家科學及技術委員會 | 2025/05/01-2026/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2024 | 教育部113年度先進製程IC設計及驗證環境建置計畫 | PI | 教育部 | 2024/07/01-2025/08/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2024 | 利用先進封裝技術整合之大型語言模型計算異質多核RISC-V軟硬體設計(1/2) | PI | 國家科學及技術委員會 | 2024/05/01-2025/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2024 | 人工智慧領域適用之優於最保守及記憶體內計算之高能效電路(3/3) | PI | 國科會 | 2024/08/01-2025/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2023 | 112年度科學園區新興科技應用計畫-「創新之人工智慧物聯網積體電路設計服務平台(2/2)」 | Co-PI | 國科會新竹科學園區管理局 | 2023/01/01-2023/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2023 | 「智原科技-中正大學」晶片設計中心合作案 | Co-PI | 智原科技股份有限公司 | 2023/08/01-2025/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2023 | 人工智慧領域適用之優於最保守及記憶體內計算之高能效電路(2/3) | PI | 國科會 | 2023/08/01-2025/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2022 | 人工智慧領域適用之優於最保守及記憶體內計算之高能效電路(1/3) | PI | 國科會 | 2022/08/01-2025/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2022 | 111年度科學園區新興科技應用計畫-「創新之人工智慧物聯網積體電路設計服務平台」 | Co-PI | 國科會新竹科學園區管理局 | 2022/01/01-2022/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2021 | 晶片系統健康監測及預測性維護 | Co-PI | 智原科技股份有限公司 | 2021/06/01-2021/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2021 | 構音異常溝通輔具之人工智慧系統與晶片-總計畫暨子計畫四：聲學感知人工智慧晶片設計(2/2) | PI | 國科會 | 2021/05/01-2022/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2020 | 構音異常溝通輔具之人工智慧系統與晶片-總計畫暨子計畫四：聲學感知人工智慧晶片設計(1/2) | PI | 國科會 | 2020/05/01-2021/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2020 | 科學園區研發精進產學合作計畫─高能效人工智慧計算平台之設計與晶片驗證 | Co-PI | 國科會新竹科學園區管理局 | 2020/06/01-2021/05/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2019 | 科學工業園區研發精進產學合作計畫－人工智慧計算之高能效及抗變異設計平台 | Co-PI | 新竹科學工業園區管理局 | 2019/05/01-2020/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2019 | 構音異常溝通輔具之人工智慧系統與晶片-總計畫暨子計畫四：聲學感知人工智慧晶片設計(2/2) | PI | 國科會 | 2019/05/01-2020/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2018 | 低功耗智慧音訊計算平台 | Co-PI | 華邦電子股份有限公司 | 2018/08/01-2019/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2018 | (交大)基於深度/機器學習之終端元件軟硬體系統設計研究--基於深度/機器學習之終端元件軟硬體系統設計研究(2/3) | Co-PI | 國科會 | 2018/08/01-2019/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2018 | 應用於工業物聯網之超低電壓末端元件及邊端計算系統設計關鍵技術-總計畫暨子計畫一：應用於工業物聯網末端元件之抗變異/低漏電之超低電壓電路設計(3/3) | PI | 國科會 | 2018/08/01-2019/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2018 | 構音異常溝通輔具之人工智慧系統與晶片-總計畫暨子計畫四：聲學感知人工智慧晶片設計(1/2) | PI | 國科會 | 2018/05/01-2019/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2018 | 科學工業園區研發精進產學合作計畫－抗變異設計技術與應用 | Co-PI | 新竹科學工業園區管理局 | 2018/05/01-2019/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2017 | (交大)隨意貼：以視覺應用為主之超低耗電穿戴式裝置晶片系統與軟體研究（3/3） | Co-PI | 國科會 | 2017/08/01-2018/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2017 | 低功耗微控制器 | Co-PI | 華邦電子股份有限公司 | 2017/03/01-2018/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2017 | 基於深度/機器學習之終端元件軟硬體系統設計研究-基於深度/機器學習之終端元件軟硬體系統設計研究(1/3) | PI | 國科會 | 2017/08/01-2018/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2017 | 先進CMOS 的系統晶片可適性設計技術(III) | Co-PI | 新竹科學工業園區管理局 | 2017/05/01-2018/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2017 | 應用於工業物聯網之超低電壓末端元件及邊端計算系統設計關鍵技術-總計畫暨子計畫一：應用於工業物聯網末端元件之抗變異/低漏電之超低電壓電路設計(2/3) | PI | 國科會 | 2017/08/01-2019/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2016 | 超低電壓MCU | PI | 新唐科技股份有限公司 | 2016/03/01-2017/03/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2016 | 以視覺為核心的物聯網應用之低耗電路與系統設計 | PI | 國科會 | 2016/08/01-2017/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2016 | 科學工業園區研發精進產學合作計畫－先進CMOS的系統晶片可適性設計技術(II) | Co-PI | 新竹科學工業園區管理局 | 2016/05/01-2017/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2016 | (交大轉撥)隨意貼：以視覺應用為主之超低耗電穿戴式裝置晶片系統與軟體研究(2/3) | Co-PI | 國立交通大學 | 2016/08/01-2017/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2016 | 應用於工業物聯網之超低電壓末端元件及邊端計算系統設計關鍵技術-總計畫暨子計畫一：應用於工業物聯網末端元件之抗變異/低漏電之超低電壓電路設計(1/3) | PI | 國科會 | 2016/08/01-2019/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2015 | 科學工業園區研發精進產學合作計畫－先進CMOS的系統晶片可適性設計技術 | Co-PI | 新竹科學工業園區管理局 | 2015/05/01-2016/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2015 | [交大]{隨意貼:以視覺應用為主之超低耗電穿戴式裝置晶片系統與軟體研究(1/3) | PI | 國科會 | 2015/08/01-2016/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2015 | 可超寬調壓之智慧視覺處理晶片系統平台-總計畫暨子計畫三：適用於可超寬調壓晶片系統之抗變異記憶體與管線式電路設計(3/3) | PI | 國科會 | 2015/08/01-2016/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2015 | 104年度智慧電子整合性人才培育計畫－主題領域模組課程發展計畫－低電壓電路設計技術 | PI | 教育部 | 2015/03/01-2016/02/28 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2014 | 科學工業園區研發精進產學合作計畫－具PVTJ感知能力之多核心CPU設計關鍵技術 | Co-PI | 新竹科學工業園區管理局 | 2014/05/01-2015/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2014 | 可超寬調壓之智慧視覺處理晶片系統平台-總計畫暨子計畫三：適用於可超寬調壓晶片系統之抗變異記憶體與管線式電路設計(2/3) | PI | 國科會 | 2014/08/01-2016/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2014 | 智慧電子整合性人才培育--主題領域模組課程發展103年度計畫 | PI | 教育部 | 2014/03/01-2015/02/28 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2013 | 科學工業園區研發精進產學合作計畫－具PVT感知能力之多核心CPU設計關鍵技術 | Co-PI | 科學工業園區管理局 | 2013/05/01-2014/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2013 | 可超寬調壓之智慧視覺處理晶片系統平台-總計畫暨子計畫三：適用於可超寬調壓晶片系統之抗變異記憶體與管線式電路設計(1/3) | PI | 國科會 | 2013/08/01-2016/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2012 | 智慧電子整合性人才培育--高階應用處理器AP相關模組發展計畫--超低電壓靜態記憶體設計模組課程發展計畫 | PI | 教育部 | 2012/12/01-2014/02/28 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2012 | 具抗變異設計之全面運用可微校的超寬調壓CMOS電路(I) | PI | 國科會 | 2012/08/01-2013/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2012 | 超低功率視訊紀錄系統與SoC技術改進與產品規劃 | PI | 國科會 | 2012/12/01-2013/11/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2012 | 科學工業園區研發精進產學合作計畫－具PVT感知能力之多核心CPU設計關鍵技術 | PI | 科學工業園區管理局 | 2012/05/01-2013/04/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2012 | Variation-Tolerant All-Digital On-Chip Temperature Sensor | PI | 智原科技股份有限公司 | 2012/06/15-2013/08/14 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2011 | 學術研究 ∕ 即時多工智慧控制（前瞻） | PI | 教育部 | 2011/04/01-2012/03/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2011 | 晶片系統國家型科技計畫研究發展及推動規劃(2/2) | PI | 國科會 | 2011/01/01-2011/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2011 | 經濟部學界科專計畫-健康照護應用之低電壓SoC設計技術3年計畫(III) | PI | 經濟部 | 2011/07/01-2012/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2011 | 低電壓及抗變異設計之關鍵技術-子計畫三：次臨界電壓之記憶體與時脈電路的抗變異設計技術3/3 | PI | 國科會 | 2011/08/01-2012/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2011 | 低電壓及抗變異設計之關鍵技術-總計畫3/3 | Co-PI | 國科會 | 2011/08/01-2012/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 科學工業園區研發精進產學合作計畫－高速綠能CPU奈米晶片設計關鍵技術 | Co-PI | 科學工業園區管理局 | 2010/10/01-2011/09/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 晶片系統國家型科技計畫研究發展及推動規劃(1/2) | PI | 國科會 | 2010/01/01-2010/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 微電子工程學門研究發展及推動規劃小組計畫(3/3) | PI | 國科會 | 2010/12/01-2011/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 經濟部學界科專計畫-健康照護應用之低電壓SoC設計技術3年計畫(II) | PI | 經濟部 | 2010/07/01-2012/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 雙通道長度之次臨界電壓電路設計方法 | PI | 財團法人工業技術研究院 | 2010/01/01-2010/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 低電壓及抗變異設計之關鍵技術-子計畫三：次臨界電壓之記憶體與時脈電路的抗變異設計技術2/3 | PI | 國科會 | 2010/08/01-2012/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 低電壓及抗變異設計之關鍵技術-總計畫2/3 | Co-PI | 國科會 | 2010/08/01-2012/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 互動式智慧型健康照護與晶片系統-總計畫(3/3) | Co-PI | 國科會 | 2010/08/01-2011/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 互動式智慧型健康照護與晶片系統-子計畫四：低功率與低電壓奈米數位電路設計(3/3) | PI | 國科會 | 2010/08/01-2011/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2010 | 經濟部學界科專計畫98年度經費結餘款 | PI | 經濟部 | 2010/07/01-2012/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 經濟部學界科專計畫-健康照護應用之低電壓SoC設計技術3年計畫(I) | PI | 經濟部 | 2009/07/01-2012/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 微電子工程學門研究發展及推動規劃小組計畫(2/3) | PI | 國科會 | 2009/12/01-2011/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 低電壓及抗變異設計之關鍵技術-子計畫三：次臨界電壓之記憶體與時脈電路的抗變異設計技術1/3 | PI | 國科會 | 2009/08/01-2012/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 科學工業園區固本精進研究計畫－結合反短通道效應和適應性基底電壓技術於跨世代奈米CMOS製程電路之性能探討 | PI | 科學工業園區管理局 | 2009/10/01-2010/09/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 低電壓及抗變異設計之關鍵技術-總計畫1/3 | Co-PI | 國科會 | 2009/08/01-2012/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 互動式智慧型健康照護與晶片系統-總計畫(2/3) | Co-PI | 國科會 | 2009/08/01-2010/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 互動式智慧型健康照護與晶片系統-子計畫四：低功率與低電壓奈米數位電路設計(2/3) | PI | 國科會 | 2009/08/01-2010/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2009 | 晶片系統之關鍵設計技術研發三年計畫(lII)結餘款 | PI | 經濟部 | 2009/07/01-2010/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-總計畫(3/3) | Co-PI | 國科會 | 2008/08/01-2009/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫五：貼心處理器II之算術運算電路及除錯支援硬體設計(3/3) | Co-PI | 國科會 | 2008/08/01-2009/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫七：貼心處理器II之高效能/高可靠度記憶體設計技術(3/3) | PI | 國科會 | 2008/08/01-2009/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 微電子工程學門研究發展及推動規劃小組計畫(1/3) | PI | 國科會 | 2008/12/01-2011/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 互動式智慧型健康照護與晶片系統-總計畫(1/3) | Co-PI | 國科會 | 2008/08/01-2009/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 97年前瞻晶片系統設計SoC--混合訊號予射頻積體電路 | PI | 教育部 | 2008/03/01-2009/02/28 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 互動式智慧型健康照護與晶片系統-子計畫四：低功率與低電壓奈米數位電路設計(1/3) | PI | 國科會 | 2008/08/01-2009/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2008 | 97年前瞻晶片系統設計SoC--系統晶片 | PI | 教育部 | 2008/03/01-2009/02/28 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 生理質素萃取與處理，第一階段：遠距照護與緊急救護之關鍵技術與平台-總計畫(I) | Co-PI | 國科會 | 2007/08/01-2008/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 生理質素萃取與處理，第一階段：遠距照護與緊急救護之關鍵技術與平台-子計畫四：低功率/低電壓/高性能BEAP數位SoC(I) | PI | 國科會 | 2007/08/01-2008/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 應用於多重標準無線通訊系統之低功率同步器IC設計 | Co-PI | 國科會 | 2007/08/01-2008/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-總計畫(2/3) | Co-PI | 國科會 | 2007/08/01-2008/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫五：貼心處理器II之算術運算電路及除錯支援硬體設計(2/3) | Co-PI | 國科會 | 2007/08/01-2008/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫七：貼心處理器II之高效能/高可靠度記憶體設計技術(2/3) | PI | 國科會 | 2007/08/01-2008/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 先進正反器之電路技術研究 | PI | 智原科技股份有限公司 | 2007/01/01-2007/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 96年前瞻晶片系統設計(SoC)學程計畫-系統晶片 | PI | 教育部 | 2007/03/01-2008/02/29 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 96年前瞻晶片系統設計(SoC)學程計畫-混合訊號與射頻積體電路 | PI | 教育部 | 2007/03/01-2008/02/29 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2007 | 晶片系統之關鍵設計技術研發三年計畫(lII) | PI | 經濟部 | 2007/04/01-2008/03/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 聯華電子65nm以下製程標準細胞元之RDR應用探討計畫 | PI | 聯華電子股份有限公司 | 2006/10/01-2007/09/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 晶片系統之關鍵設計技術研發三年計畫(lI) | PI | 經濟部 | 2006/04/01-2007/03/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 高速度低功率多重資料流乘法器設計 | PI | 工研院系統晶片科技中心 | 2006/01/01-2006/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫五：貼心處理器II之算術運算電路及除錯支援硬體設計(1/3) | Co-PI | 國科會 | 2006/08/01-2007/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 貼心處理器II—超越雙核心之嵌入式系統平台技術研發-子計畫七：貼心處理器II之高效能/高可靠度記憶體設計技術(1/3) | PI | 國科會 | 2006/08/01-2007/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-總計畫(3/3) | Co-PI | 國科會 | 2006/08/01-2007/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-子計畫一：CAMCI系統之低功率/高效能Texture編解碼器及VLC/VLD數位矽智財/晶片設計(3/3) | PI | 國科會 | 2006/08/01-2007/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2006 | 應用於多重標準無線通訊系統之低功率同步器IC設計 | Co-PI | 國科會 | 2006/08/01-2008/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-子計畫一：CAMCI系統之低功率/高效能Texture編解碼器及VLC/VLD數位矽智財/晶片設計(2/3) | PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-總計畫(2/3) | Co-PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫六：晶片系統之貼心(UniCore)處理器之低功率低電壓CMOS電路設計(3/3) | PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | UMC-聯華電子65nm製程低漏電電路元資料庫計畫 | PI | 聯華電子股份有限公司 | 2005/07/01-2006/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 中科「世愛科技股份有限公司」營運計畫書審查案 | Co-PI | 中部科學工業園區開發籌備處 | 2005/11/15-2005/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 晶片系統之關鍵設計技術研發三年計畫(l) | PI | 經濟部 | 2005/04/01-2006/03/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫四：晶片系統之貼心(UniCore)處理器之高效能低功率算術運算單元設計(3/3) | Co-PI | 國科會 | 2005/08/01-2006/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 低功率多媒體晶片系統之貼心(UniCore)處理器-總計畫(3/3) | Co-PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 應用於晶片系統之超低功率處理器設計技術-總計畫(3/3) | Co-PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 應用於晶片系統之超低功率處理器設計技術-子計畫一：應用於晶片系統中超低功率處理器之變動式雙電壓電路設計技術(3/3) | Co-PI | 國科會 | 2005/08/01-2006/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2005 | 支援低功率區域與時域電壓調變之先進電路 | PI | 財團法人工業技術研究院 | 2005/01/01-2005/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 低功率多媒體晶片系統之貼心(UniCore)處理器-總計畫(2/3) | Co-PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | Advanced Low-Power Digital Circuit Design Techniques for Single Sub-1V Embedded Microprocessors in 0.13um Technology | PI | 財團法人工業技術研究院 | 2004/01/01-2004/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 九十三會計年度「超大型積體電路與系統設計教育改進－聯盟發展計畫」S&IP DIP組聯盟：奈米電路設計 | PI | 教育部 | 2004/06/02-2004/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-子計畫一：CAMCI系統之低功率/高效能Texture編解碼器及VLC/VLD數位矽智財/晶片設計(1/3) | PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 通曉內容之多媒體資料壓縮/索引系統及數位矽智財/晶片設計-總計畫(1/3) | Co-PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫六：晶片系統之貼心(UniCore)處理器之低功率低電壓CMOS電路設計(2/3) | PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫四：晶片系統之貼心(UniCore)處理器之高效能低功率算術運算單元設計(2/3) | Co-PI | 國科會 | 2004/08/01-2005/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 應用於晶片系統之超低功率處理器設計技術-總計畫(2/3) | Co-PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2004 | 應用於晶片系統之超低功率處理器設計技術-子計畫一：應用於晶片系統中超低功率處理器之變動式雙電壓電路設計技術(2/3) | Co-PI | 國科會 | 2004/08/01-2005/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 九十二會計年度「超大型積體電路與系統設計教育改進計畫－聯盟發展計畫」：DIP聯盟－奈米電路設計：IP Circuit Design Basics | PI | 教育部 | 2003/05/09-2003/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫四：晶片系統之貼心(UniCore)處理器之高效能低功率算術運算單元設計(1/3) | Co-PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 低功率多媒體晶片系統之貼心(UniCore)處理器-子計畫六：晶片系統之貼心(UniCore)處理器之低功率低電壓CMOS電路設計(1/3) | PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 提升產業技術及人才培育研究計畫--CMOS影像感測器設計技術研究 | PI | 數通科技股份有限公司 | 2003/06/01-2004/05/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 提升產業技術及人才培育研究計畫--CMOS影像感測器設計技術研究 | PI | 國科會 | 2003/06/01-2004/05/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 應用於晶片系統之超低功率處理器設計技術-總計畫(1/3) | Co-PI | 國科會 | 2003/11/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 應用於晶片系統之超低功率處理器設計技術-子計畫一：應用於晶片系統中超低功率處理器之變動式雙電壓電路設計技術(1/3) | Co-PI | 國科會 | 2003/11/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 低功率多媒體晶片系統之貼心(UniCore)處理器-總計畫(1/3) | PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 支援彈性即時資料流與資料索引功能之MPEG4/7音訊及視訊編碼器/解碼器-總計畫(I) | Co-PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 支援彈性即時資料流與資料索引功能之MPEG4/7音訊及視訊編碼器/解碼器-子計畫三：MPEG4/7晶片系統之FGS圖樣編解碼器即可逆式VLC/VLD矽智財設計(I) | PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2003 | 支援彈性即時資料流與資料索引功能之MPEG4/7音訊及視訊編碼器/解碼器-子計畫四：MPEG 4/7晶片系統之低功率音訊/音效處理器設計(I) | Co-PI | 國科會 | 2003/08/01-2004/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 提升產業技術及人才培育研究計畫-CMOS影像感測器設計技術研究 | PI | 國科會 | 2002/06/01-2003/05/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 提升產業技術及人才培育研究計畫-CMOS影像感測器設計技術研究 | PI | 數通科技股份有限公司 | 2002/06/01-2003/05/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 九十一會計年度「超大型積體電路與系統設計」教育改進計畫－大學校院矽智產設計競賽 | PI | 教育部 | 2002/01/01-2002/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 效能導向的架構可調整式暨可程式化之低功率晶片系統設計平台-總計畫 | Co-PI | 國科會 | 2002/08/01-2003/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 效能導向的架構可調整式暨可程式化之低功率晶片系統設計平台-子計畫六:單晶片系統之低電壓低功率數位電路設計平台 | PI | 國科會 | 2002/08/01-2003/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 高性能VLSI電路技術研究(3/3) | PI | 國科會 | 2002/08/01-2003/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 九十學年度大專院校矽智產(SIP)設計競賽 | PI | 國科會 | 2002/02/20-2002/11/20 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2002 | 輔導新設國立大學健全發展計畫:重點領域發展計畫:健全SOC設計環境計畫 | PI | 教育部 | 2002/08/01-2002/12/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2001 | 網路處理器的設計與製作（Ⅱ） | Co-PI | 國科會 | 2001/08/01-2002/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2001 | 智財導向的設計與測試技術及其在高階32位元微控制器核心設計上的實際應用(3/3)-子計畫三：給利用核心元件而設計的系統使用之低功率及高速VLSI電路設計 | PI | 國科會 | 2001/08/01-2002/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2001 | 智財導向的設計與測試技術及其在高階32位元微控制器核心設計上的實際應用(3/3)-總計畫 | Co-PI | 國科會 | 2001/08/01-2002/08/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2001 | 高性能VLSI電路技術研究(2/3) | PI | 國科會 | 2001/08/01-2002/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2001 | 八十九學年度大學校院矽智產(SIP) 設計競賽 | PI | 教育部 | 2001/02/08-2001/11/07 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2000 | 高性能VLSI電路技術研究(1/3) | PI | 國科會 | 2000/08/01-2001/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2000 | 智財導向的設計與測試技術及其在高階32位元微控制器核心設計上的實際應用(2/3) －總計畫 | Co-PI | 國科會 | 2000/08/01-2001/10/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 2000 | 智財導向的設計與測試技術及其在高階32位元微控制器核心設計上的實際應用(2/3) －子計畫三：給利用核心元件而設計的系統使用之低功率及高速VLSI電路設計 | PI | 國科會 | 2000/08/01-2001/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1999 | 智財導向的設計與測試技術及其在高階32位元微控制器核心設計上的實際應用(1/3) －子計畫三：給利用核心元件而設計的系統使用之低功率及高速VLSI電路設計 | PI | 國科會 | 1999/08/01-2000/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1999 | 89會計年度VLSI與系統設計教育改進計畫 | PI | 教育部 | 1999/09/01-2000/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | 免授權 1.9 GHZ 頻段個人通信系統之晶片組研究與製作－總計劃 | Co-PI | 國科會 | 1998/08/01-1999/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | 免授權 1.9GHZ 頻段個人通信系統之晶片組研究與製作－子計劃二：調變/解調晶片組研究與製作 | PI | 國科會 | 1998/08/01-1999/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | 高速無線網路等化器晶片設計 | PI | 財團法人工業技術研究院電通所 | 1998/07/01-1999/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | VLSI與系統設計教育改進計畫 | PI | 教育部 | 1998/10/01-1999/06/30 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | 低功率特定應用嵌入式微控制器設計系統－總計畫（三） | PI | 國科會 | 1998/08/01-1999/07/31 |
| Wang, Jinnshyan | Department of Electrical Engineering | 1998 | 低功率特定應用嵌入式微控制器設計系統（三）－子計畫三：低功率積體電路及其細胞元資料庫之研製（三） | PI | 國科會 | 1998/08/01-1999/07/31 |
Patents
Print-friendly| Patents | Apply Date | Apply Number | Patent Number | Patent Country | Inventor |
|---|---|---|---|---|---|
| 用於內容可定位址記憶體之雙埠AND型比對型電路 | 2007/10/12 | 11/907,524 | US 07,667,993 B2 | U.S.A. | Jinn-shyan Wang |
| 記憶體裝置及其操作方法 | 2021/09/06 | 110133035 | 發明字第I782693號 | R.O.C | Jinn-shyan Wang |
| 記憶體裝置及其操作方法 | 2021/10/22 | 17/508,768 | US11,776,621B2 | U.S.A. | Jinn-shyan Wang |
| 適用於低工作電壓之記憶體電路 | 2011/12/22 | 100148011 | I457935 | R.O.C | Jinn-shyan Wang |
| 適用於低工作電壓之記憶體電路 | 2012/05/22 | 13/477,437 | US 8,743,592 B2 | U.S.A. | Jinn-shyan Wang |
| 單端讀取之隨機存取記憶體裝置 | 2012/03/29 | 101110981 | I494945 | R.O.C | Jinn-shyan Wang |
| 單端感測放大裝置 | 2020/02/19 | 109105280 | 發明第I732459號 | R.O.C | Jinn-shyan Wang |
| 可應用於內容可定址記憶體之分段式搜尋線電路裝置 | 2006/07/31 | 95128033 | I301623 | R.O.C | Jinn-shyan Wang |
| 單端感測放大裝置 | 2020/04/21 | 16/854,124 | US10,971,196B1 | U.S.A. | Jinn-shyan Wang |
| 可應用於內容可定位址記憶體之分段式搜尋線電路裝置 | 2006/09/12 | 11/519,089 | US 7,414,872 B2 | U.S.A. | Jinn-shyan Wang |
| 可應用於內容可定址記憶體之樹狀AND型比對電路裝置 | 2006/07/31 | 95128034 | I303071 | R.O.C | Jinn-shyan Wang |
| 可應用於內容可定址記憶體之樹狀AND型比對電路裝置 | 2006/09/11 | 11/518,447 | US 7,586,771 B2 | U.S.A. | Jinn-shyan Wang |
| 可應用於內容可定址記憶體之樹狀AND型比對電路裝置 | 2008/11/06 | 12/289,859 | US 7,663,938 B2 | U.S.A. | Jinn-shyan Wang |
| 低電壓內容可定址記憶體之讀取與比對電路 | 2008/12/05 | 97147568 | I405206 | R.O.C | Jinn-shyan Wang |
| 低電壓內容可定址記憶體之讀取與比對電路 | 2009/05/07 | 12/436,883 | US 8,000,120 B2 | U.S.A. | Jinn-shyan Wang |
| 記憶體裝置及其操作方法 | 2020/10/26 | 2020-178766 | 特許第7002783号 | JAPAN | Jinn-shyan Wang |
| 記憶體裝置及其操作方法 | 2020/07/28 | 109125436 | 發明第I726778號 | R.O.C | Jinn-shyan Wang |
| 記憶體裝置及其操作方法 | 2020/10/19 | 17/073,672 | US 11,404,112 B2 | U.S.A. | Jinn-shyan Wang |
| 低突波之布式編/解碼器 | 2007/09/13 | 96134161 | I369856 | R.O.C | Jinn-shyan Wang |
| 階層化陣列搭配動態區段防護之源極編碼NOR型唯讀記憶體 | 2013/03/05 | 102107699 | I501355 | R.O.C | Jinn-shyan Wang |
| 階層化陣列搭配動態區段防護之源極編碼NOR型唯讀記憶體 | 2013/05/30 | 13/905,577 | US 8,824,185 B1 | U.S.A. | Jinn-shyan Wang |
| 具有預借時間餘裕與局部提高電壓之動態電壓調變系統 | 2012/12/21 | 101149022 | I470395 | R.O.C | Jinn-shyan Wang |
| 具有預借時間餘裕與局部提高電壓之動態電壓調變系統 | 2013/12/20 | 14/136,737 | US 8,933,726 B2 | U.S.A. | Jinn-shyan Wang |
| 具解時脈扭曲之延遲鎖定電路 | 2010/11/05 | 99138051 | I445313 | R.O.C | Jinn-shyan Wang |
| 具解時脈扭曲之延遲鎖定電路 | 2011/06/13 | 13/158,697 | US 8,294,498 B2 | U.S.A. | Jinn-shyan Wang |
| 差分式高速動態相位偵測器 | 2006/07/11 | 95125306 | I405414 | R.O.C | Jinn-shyan Wang |
| 低功率動態邏輯電路 | 2001/03/21 | 90106570 | 200086 | R.O.C | Jinn-shyan Wang |
| 低功率動態邏輯電路 | 2001/05/11 | 09/854,113 | US 6,492,839 B2 | U.S.A. | Jinn-shyan Wang |
| 低功率可程式化邏輯陣列電路的組合方法 | 2001/04/20 | 90109496 | 152194 | R.O.C | Jinn-shyan Wang |
| 低功率可程式化邏輯陣列電路的組合方法 | 2001/08/17 | 09/932,392 | US 6,433,577 B1 | U.S.A. | Jinn-shyan Wang |
| 具有單一延遲線及最少化工作延遲細胞元之延遲鎖定電路 | 2002/11/29 | 91134896 | I282664 | R.O.C | Jinn-shyan Wang |
| 具有單一延遲線及最少化工作延遲細胞元之延遲鎖定電路 | 2002/12/25 | 2002-373899 | 3849871 | JAPAN | Jinn-shyan Wang |
| 差分式延遲細胞元電路 | 2005/04/04 | 94110755 | I335728 | R.O.C | Jinn-shyan Wang |
| 單一低電壓電源金氧半正反器及其控制方法 | 2005/05/04 | 94114399 | I253808 | R.O.C | Jinn-shyan Wang |
| 單一低電壓電源金氧半正反器及其控制方法 | 2005/08/26 | 11/211,666 | US 7,224,197 B2 | U.S.A. | Jinn-shyan Wang |
| 可應用於內容可定址記憶體之AND型比較線電路結構 | 2005/07/15 | 94124219 | I265529 | R.O.C | Jinn-shyan Wang |
| 靜態隨機存取記憶體細胞元陣列、靜態隨機存取記憶體細胞元及其操作方法 | 2017/03/10 | 106108014 | I614750 | R.O.C | Jinn-shyan Wang |
| 靜態隨機存取記憶體細胞元陣列、靜態隨機存取記憶體細胞元及其操作方法 | 2017/07/21 | 15/655,914 | US 10,127,976 B2 | U.S.A. | Jinn-shyan Wang |
| 一種相位偵測器 | 2006/09/27 | 95135788 | I366345 | R.O.C | Jinn-shyan Wang |
| 一種相位偵測器 | 2007/06/04 | 11/757,833 | US 7,756,236 B2 | U.S.A. | Jinn-shyan Wang |
Source：Chung Cheng Academic Achievements Information System